描述：The ADSP-BF548 processors were specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. For applications that require additional external memory, the ADSP-BF548 family provides product variants specifically designed to interface to either Standard DDR1 or 1.8V Low-Power DDR memory devices. IP protection has become a necessary part of today’s embedded applications. The ADSP-BF54x provides a security scheme that balances flexibility and upgradeability with performance through the inclusion of a firmware based solution including OTP memory to enable users to implement private keys for secure access to program code. The ADSP-BF548 provides peripheral flexibility to complement its high performance processing. These rich system level peripherals are well suited for Advanced Vehicle Infotainment and Industrial multimedia applications where multiple standards are prevalent and system performance is required. To enhance connectivity, a High Speed USB On-the-Go (HS USB OTG) module with Integrated PHY has been integrated along with an 8/16-bit Host DMA Interface. These system level peripherals, along with standard serial connections provided by multiple on-chip SPORT, SPI, UART, TWI, and CAN interfaces, provide glue-less interfaces to multiple off chip devices including consumer and communication products, Bluetooth, and other application specific interfaces. This level of integration is perfect for the emerging and constantly changing products and standards in the car infotainment and multimedia segments. For interfacing off chip to storage media including hard drives, CD/DVD-drives, and NAND Flash products, the ADSP-BF548 has implemented a SD/SDIO controller, ATAPI-6 controller, and an 8/16-bit NAND flash controller. Many multimedia enhancements have also been included on the ADSP-BF548 to offload processor MIPS through hardware integration, expand display capabilities, and shorten customer development time. The multiple Enhanced Parallel Peripheral Interfaces that support ITU-R BT.656 Video Formats now can also drive 18/24-bit LCD displays. A Hardware acceleration block, the Pixel Compositor, has been developed to execute overlay, color conversion and alpha blending. This block significantly reduces processor core overhead associated with software RGB-YUV color conversion and alpha blending. For human interface capability, the ADSP-BF548 provides a 32-bit up/down counter that can sense 2-bit quadrature or binary codes as typically emitted by industrial drives or manual thumb wheels. An 8x8 Keypad interface is also included.
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